The present invention relates to digital signal reproduction devices, integrated circuits for use therewith, and digital signal reproduction methods, and more particularly to a reproduction device, for example, suitable for reproduction of a digital signal recorded on an optical disk, an integrated circuit for use therewith, and a reproduction method.
Conventional digital signal reproducing devices, for example compact disk (CD) players, are classified into two systems; i.e., one system which uses an analog data strobe circuit for a data strobe circuit which intercepts serial data and reproduces a clock synchronous with the data and the other system which uses a digital data strobe circuit for the analog data strobe circuit.
The former system which uses the analog data strobe circuit is provided with an analog phase locked loop (PLL) which makes a phase comparison between the output of a voltage-controlled oscillator (VCO) and a polarity-inverted version of an input EFM (Eight to Fourteen Modulation code) signal (a required data component signal separated from the reproduced output of a pickup) since the EFM signal has a pulse period of 3T-11T where T is the period of the transmission rate to thereby intercept data and reproduce a clock synchronous with the data, as disclosed in JP-A-59-124013.
In the latter system which uses the digital data strobe circuit, a counter which operates at a clock having a frequency high sufficiently compared to the transmission rate used to extract only a falling edge of a timing allowed in format from the received EFM signal and be synchronized with the falling edge in operation, thus reproducing a clock synchronous with the data from the counter outputting and fetching the data thereby, as disclosed in JP-A-58-64840.
In the above conventional system which uses the analog data strobe circuit, the analog PLL is locked to the polarity-inverted version of the received EFM signal to reproduce a clock synchronous with the data. If signals input to the data strobe circuit successively drop out due to a possible crack on a disk, the PLL locked so far to the received signal is unlocked from the same and the VCO starts to oscillate in a free running manner. Thus, even after the dropout of the received signals due to the crack disappears, no clocks are reproduced from the data for an interval of time corresponding to the pull-in time of the PLL. That is, it takes much time for recovery to the steady state because of the crack and a quantity of data to be lost would increase.
In the system which uses the digital data strobe circuit, the counter which operates with a clock having a frequency high sufficiently compared to the transmission rate is synchronized with a falling edge of the received signal to thereby reproduce a clock synchronous with the data. Thus, a clock synchronous with the data is reproducible from a time when the falling edge is received after the dropout of the data due to the crack. In the CD player, the time taken for the synchronous clock to become reproducible in the digital data strobe circuit after the dropout of the data due to the crack is generally short, for example about 300 .mu.s (corresponding to the time taken for 2-frame data to become reproduced in the CD player) compared to the analog data strobe circuit. However, the digital data strobe circuit is only capable of determining the phase of the synchronous clock with the accuracy of the period of the clock of the synchronous clock reproduction counter. Therefore, in a signal-to-noise (S/N) versus error rate characteristic (where S/N is the signal level to noise level ratio of the received signal) indicative of the probability that the data intercepted with the synchronous clock reproduced by the data strobe circuit would be an error, the CD player is required to be excellent generally by more than about 4 db in S/N ratio compared to the analog data strobe circuit in order to obtain the same error rate.
That is, although the analog data strobe circuit is excellent in steady state performance, it has the problem that it is slow in recovery after the dropout of data due to a crack. In contrast, although the digital data strobe circuit is rapid in recovery after the dropout of data due to a crack, it has the problem that it is inferior in steady state performance.